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isolated precision half - bridge driver, 4 a output data sheet adum3223/adum4223 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no res ponsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise und er any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devices, inc. all rights reserved. f eatures 4 a peak output current w orking voltage high - side or low - side relative to input: 565 v dc peak hig h - side to low - side differential: 70 0 v dc peak high frequency operation: 1 mhz maximum 3.3 v to 5 v cmos input l ogic 4.5 v to 18 v output drive uvlo at 2.5 v v dd1 adum 3223a/ adum 4223a uvlo at 4.1 v v dd2 adum 3223b/ adum 4223b uvlo at 7.0 v v dd2 adum 3223c/ adum 4223c uvlo at 11 .0 v v dd2 precise timing characteristics 4 9 ns maximum isolator and driver propagation delay 5 ns maximum channel - to - channel matching c mos input logic levels high common - mode transient immunity: > 50 kv/s enhanced system - level esd performance per iec 61000 - 4 - x high junction temperature operation: 1 2 5c default low output safety and regu latory approvals (pending) adum 3223 n arrow body, 16 - lead soic ul 1577 30 00 v rms input - to - output withstand voltage adum 4223 w ide body, 16 - lead soic ul 1577 5000 v rms input - to - output withstand voltage a pplications switching power supplies isolated igbt/mosfet gate drives industrial inverters general description the adum 3223/ adum 4 2 23 1 are 4 a isolated, half - b ridge gate driver s that employ the analog devices , inc. , i coupler? technology to provide independent and isolated high - side and low - side outputs. the adum 3223 provides 3000 v rms isolation in the narrow bod y , 16 - lead soic package, and the adum 4 223 provides 5000 v rms isolation in the wide body , 16- lead soic package. combining high speed cmos and monolithic transformer technology, th e s e isolation component s pro vide outstanding performance characteristics superior to the alternatives , such as the combination of pulse transformers and gate drivers . the adum 3223/ adum 4 223 isolator s each provide two independent isolat ed channels. they operate with an input supply ranging from 3.0 v to 5.5 v, providing compatibility with lower voltage systems. in comparison to gate drivers employing high voltage level translation methodolog ies, the adum 3223/ adum 4223 offer the benefit of true, galvanic isola tion between the input and each output . each output may be continuously operated up to 560 v peak relative to the input, thereby supporting low - side switching to negative voltages. the differential voltage between the high - side a nd low - side may be as high as 70 0 v peak . as a result, the adum 3223/ adum 4223 provide reliable control over the switching characteristics of igbt/mosfet configurations over a wide range of positive or negative switching voltages. functional block dia gram encode decode encode decode disable nc nc v dd1 nc v ddb v ob gnd b 5 6 7 8 12 11 gnd 1 nc 4 13 v dd1 gnd a 3 14 v ib v oa 2 15 v ia v dda 1 16 10 9 nc = no connect adum3223/ adum4223 10450-001 figure 1. 1 protected by u.s. patents 5,952,849; 6,873,065; 7,075,239. other patents pending.
adum322 3/adum4223 data sheet rev. 0| page 2 of 20 table of contents features .............................................................................................. 1 applic ations ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revisi on history ............................................................................... 2 specifications ..................................................................................... 3 electrical characteristics 5 v operation ................................ 3 electrical characteristics 3.3 v operation ............................. 4 package characteristics ............................................................... 5 insulation and safety - related specifications ............................ 5 regulatory information ............................................................... 6 din v vde v 0884 - 10 (vde v 0884 - 10) insulation characteristics .............................................................................. 7 recommended operating conditions ...................................... 8 absolute maximum ratings ............................................................9 esd caution ...................................................................................9 pin configuration and function descriptions ........................... 11 typical performance characteristics ........................................... 12 appli cations information .............................................................. 15 pc board layout ........................................................................ 15 propagation delay - related parameters ................................... 15 thermal limitations and switch load characteristics ......... 15 output load characteristics ..................................................... 15 dc correctness and magne tic field immunity ........................... 16 power consumption .................................................................. 17 insulation lifetime ..................................................................... 17 outline dimensions ....................................................................... 18 ordering guide .......................................................................... 19 revision history 5 /12 revision 0 : initial versi on
data sheet adum3223/adum4223 rev. 0| page 3 of 20 specifications electrical character istics 5 v operation all volta ges are relative to their respective ground. 4.5 v v dd1 5.5 v , 4.5 v v dd2 18 v , unless stated otherwise. all minimum/ maximum specifications apply over t j = ? 40 c to 125 c. all typical specifications are at t j = 25c, v dd1 = 5 v, v dd2 = 1 2 v. switchin g specifications are tested with cmos signal levels. table 1 . parameter symbol min typ max unit test conditions dc specifications input supply current, quiescent i ddi (q) 1. 4 2.4 ma output supply current, p er channel, quiescent i ddo (q) 2. 3 3.2 ma supply current at 1 m hz v dd1 supply current i dd1 (q) 1. 6 2.5 ma up to 1 mhz , no load v dd a /v dd b supply current i dd a /i dd b (q) 5.6 8 .0 ma up to 1 mhz , no load input currents i ia , i ib ?1 +0.01 +1 a 0 v ia , v ib v dd1 logic high input threshold v ih 0.7 v dd1 v logic low input threshold v il 0.3 v dd1 v logic high output voltages v oah , v o b h v dd2 C 0.1 v dd2 v i ox = ?20 m a, v ix = v ixh logic low output voltages v oal , v o bl 0.0 0.1 5 v i ox = + 20 m a, v ix = v ixl undervoltage lockout, v dd2 supply positive going threshold v dd2uv+ 4. 1 4. 4 v a - g rade negative going threshold v dd2uv ? 3.2 3 .6 v a - g rade hysteresis v dd2uvh 0. 5 v a - g rade positive going threshold v dd2uv+ 6.9 7. 4 v b - g rade negative going threshold v dd2uv ? 5.7 6 . 2 v b - grade hysteresis v dd2uvh 0. 7 v b - g rade positive going threshold v dd2uv+ 10.5 11. 1 v c - g rade negative going threshold v dd2uv ? 8.9 9.6 v c - g rade hysteresis v dd2uvh 0.9 v c - g rade output short - circuit pulsed current 1 i oa(sc) , i ob(sc) 2.0 4.0 a v dd2 = 1 2 v output pulsed source resistance r oa , r ob 1.1 ? v dd2 = 1 2 v output pulsed sink resistance r oa , r ob 0.6 ? v dd2 = 1 2 v switching specifications pulse width 2 pw 50 ns c l = 2 n f , v dd2 = 1 2 v maximum data rate 3 1 m hz c l = 2 n f , v dd2 = 1 2 v propagation delay 4 t dhl , t dlh 26 3 8 4 9 ns c l = 2 n f, v dd2 = 1 2 v ; see figure 20 adum 3223a/ adum 4223a t dhl , t dlh 30 4 2 5 4 ns c l = 2 nf , v dd2 = 4.5 v ; see figure 20 propagation delay skew 5 t psk 12 ns c l = 2 n f, v dd2 = 1 2 v ; see figure 20 channel - to - channel matching 6 t pskcd 1 5 ns c l = 2 nf, v dd2 = 1 2 v ; see figure 20 t pskcd 1 7 ns c l = 2 nf, v dd2 = 4.5 v ; see figure 20 output rise/fall time (10% to 90%) t r /t f 6 1 2 18 ns c l = 2 nf, v dd2 = 1 2 v ; see figure 20 dynamic input supply current p er channel i ddi(d) 0.05 ma/mbps v dd2 = 1 2 v dynamic output supply current p er channel i ddo(d) 1. 65 ma/mbps v dd2 = 1 2 v refresh rate f r 1.2 mbps 1 short - c ircuit duration less than 1 s . average power must conform to the limit shown u nder the absolute maximum ratings . 2 the minimum pulse width is the shortest pulse width at which the specified timing parameter is guaranteed. 3 the maximum data rate is the fastest data rate at which the specified timing paramet er is guaranteed. 4 t dlh propagation delay is measured from the time of the input rising logic high threshold, v ih , to the output rising 10% level of the v ox signal. t dhl propagation delay is measured from the input falling logic low threshold, v il , to the output falling 90% threshold of the v ox signal. see figure 20 for waveforms of propagation delay parameters. 5 t psk is the magnitude of the worst - case difference in t dlh and/or t dhl that is measured between units at the same ope rating temperature, supply voltages, and output load within the recommended operating conditions. see figure 20 for waveforms of propagation delay parameters. 6 c hannel - to - channel matching is the absolute value of the difference i n propagation delays between the two channels.
adum322 3/adum4223 data sheet rev. 0| page 4 of 20 electrical character istics 3 .3 v o peration all voltages are relative to their respective ground. 3.0 v v dd1 3.6 v, 4.5 v v dd2 18 v , unless stated otherwise. all minimum/ maximum specifications apply over t j = ? 40 c to 125 c . all typical specifications are at t j = 25c, v dd1 = 3.3 v, v dd2 = 1 2 v. switching specifications are tested with cmos signal levels. table 2 . parameter symbol min typ max unit test conditions dc specifications input supply current , quiescent i ddi (q) 0. 87 1. 4 ma output supply current, p er channel, quiescent i ddo (q) 2. 3 3.2 ma supply cu rrent at 1 mhz v dd1 supply current i dd1 (q) 1. 1 1.5 ma up to 1 mhz, no load v dd a /v ddb supply current i dd a /i dd b (q) 5 . 6 8 .0 ma up to 1 mhz, no load input currents i ia , i ib ?10 +0.01 +10 a 0 v ia , v ib v dd1 logic high input threshold v ih 0.7 v dd1 v logic low input threshold v il 0.3 v dd1 v logic high output voltages v oah , v ob h v dd2 C 0.1 v dd2 v i ox = ?20 ma, v ix = v ixh logic low output voltages v oal , v obl 0.0 0.15 v i ox = + 20 ma, v ix = v ixl undervoltage lockout, v dd2 supply positive going threshold v dd2uv+ 4.1 4.4 v a - g rade negative going threshold v dd2uv ? 3.2 3.6 v a - g rade hysteresis v dd2uvh 0.5 v a - g rade positive going threshol d v dd2uv+ 6.9 7.4 v b - g rade negative going threshold v dd2uv ? 5.7 6.2 v b - g rade hysteresis v dd2uvh 0.7 v b - g rade positive going threshold v dd2uv+ 10.5 11.1 v c - g rade negative going threshold v dd2uv ? 8.9 9.6 v c - g rade hysteresis v dd2uvh 0.9 v c - g rade output short - circuit pulsed current 1 i oa(sc) , i ob(sc) 2.0 4.0 a v dd2 = 1 2 v output pulsed source resistance r oa , r ob 1.1 ? v dd2 = 1 2 v output pulsed sink resistance r oa , r ob 0.6 ? v dd2 = 1 2 v switching specifications puls e width 2 pw 50 ns c l = 2 nf, v dd2 = 1 2 v maximum data rate 3 1 mhz c l = 2 nf, v dd2 = 1 2 v propagation delay 4 t dhl , t dlh 3 0 4 2 54 ns c l = 2 nf, v dd2 = 1 2 v, see figure 20 adum 3223a/ adum 4223a t dhl , t dlh 3 2 46 60 ns c l = 2 nf, v dd2 = 4.5 v , see figure 20 propagation delay skew 5 t psk 12 ns c l = 2 nf, v dd2 = 1 2 v , see figure 20 channel - to - channel matching 6 t pskcd 1 5 ns c l = 2 nf, v dd2 = 1 2 v, see figure 20 t pskcd 1 7 ns c l = 2 nf, v dd2 = 4.5 v, see figure 20 output rise/fall time (10% to 90%) t r /t f 6 12 22 ns c l = 2 nf, v dd2 = 1 2 v, see figure 20 dynamic input supply current p er channel i ddi(d) 0.0 5 ma/mbps v dd2 = 1 2 v dynamic output supply current p er channel i ddo(d) 1. 6 5 ma/mbps v dd2 = 1 2 v refresh rate f r 1.1 mbps 1 short - c ircuit duration less than 1 s . average power must conform to the limit shown under the absolute maximum ratings . 2 the minimum pulse width is the shortest pulse width at wh ich the specified timing parameter is guaranteed . 3 the maximum data rate is the fastest data rate at which the specified timing parameter is guaranteed. 4 t dlh propagation delay is measured from the time of the input rising logic high threshold, v ih , to t he output rising 10% level of the v ox signal. t dhl propagation delay is measured from the input falling logic low threshold, v il , to the output falling 90% threshold of the v ox signal. see figure 20 for waveforms of propagation delay parameters. 5 t psk is the magnitude of the worst - case difference in t dlh and/or t dhl that is measured between units at the same operating temperature, supply voltages, and output load within the recommended operating conditions. see figure 20 for waveforms of propagation delay parameters. 6 c hannel - to - channel matching is the absolute value of the difference in propagation delays between the two channels.
data sheet adum3223/adum4223 rev. 0| page 5 of 20 package characterist ics t able 3 . parameter symbol min typ max unit test conditions resistance (input -to - output) r i - o 10 12 ? capacitance (input -to - output) c i - o 2.0 pf f = 1 mhz input capacitance c i 4.0 pf ic junction - to - ambient t hermal resistance adum 3223 j a 76 c/w adum 4223 j a 45 c/w ic junction - to - case thermal resistance adum 3223 j c 42 c/w adum 4223 jc 29 c/w insulation and safet y - related specificatio ns adum 3223 table 4 . paramete r symbol value unit conditions rated dielectric insulation voltage 300 0 v rms 1 minute duration minimum external air gap (clearance) l(i01) 4 .0 min mm measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) 4.0 min mm measured from input terminals to output terminals, shortest distance path along body minimum internal gap (internal clearance) 0. 017 min mm insulation distance through insulation tracking resistanc e (comparative tracking index) cti > 400 v din iec 112/vde 0303 part 1 isolation group ii material group (din vde 0110, 1/89, table 1) adum 4223 table 5 . parameter symbol v alue unit conditions rated dielectric insulation voltage 500 0 v rms 1 minute duration minimum external air gap (clearance) l(i01) 8 .0 min mm measured from input terminals to output terminals, shortest distance through air minimum external tr acking (creepage) l(i02) 7 . 6 min mm measured from input terminals to output terminals, shortest distance path along body minimum internal gap (internal clearance) 0. 017 min mm insulation distance through insulation tracking resistance (comparati ve tracking index) cti > 400 v din iec 112/vde 0303 part 1 isolation group ii material group (din vde 0110, 1/89, table 1)
adum322 3/adum4223 data sheet rev. 0| page 6 of 20 regulatory informati on the adum 3223 approval is pending by the organizati ons listed in table 6 . table 6 . ul csa vde recognized under ul 1577 component recognition program 1 approved under csa component acceptance notice #5a certified a ccording to din v vde v 0884 -10 (vde v 08 84 - 10): 2006- 12 2 single/ protection 3000 v rms isolation voltage basic insulation per csa 60950 -1 - 07 and iec 60950 - 1 , 400 v rms (56 5 v peak) maximum working voltage reinforced insulation, 560 v peak file e214100 file 205078 file 2471900 - 4880 - 0001 1 in accordance with ul 1577, each adum3223 is proof tested by applying an insulation test voltage 3 6 00 v rms for 1 second ( current leakage detection limit = 6 a) . 2 in accordance with din v vde v 0884 - 10 , each adum3223 is proof tested by applying an insulation test voltage 1 050 v peak fo r 1 second (partial discharge detection limit = 5 pc). an asterisk (*) marking branded on the component designates din v vde v 0884 - 10 approval. th e adum 4223 approv al is pending by the organizations listed in table 7 . table 7 . ul csa vde recognized under ul 1577 component recognition program 1 approve d under csa component acceptance notice #5a certified according to din v vde v 0884 - 10 (vde v 0884 - 10): 2006- 12 2 single/ protection 50 00 v rms isolation voltage reinforced insulation per csa 60950 -1 - 07 and iec 60950 -1 , 400 v rms ( 5 65 v peak) maximum wor king voltage basic insulation per csa 60950- 1 - 07 and iec 60950 - 1, 800 v rms ( 1131 v peak ) maximum working voltage reinforced insulation, 8 49 v peak file e214100 file 205078 file 2471900 - 4880 - 0001 1 in accordance with ul 1577, each adum422 3 is proof tested by applying an insulation test voltage 6 000 v rms for 1 second (current leakage detection limit = 10 a) . 2 in accordance with din v vde v 0884 - 10 , each adum4223 is proof tested by applying an insulation test voltage 159 0 v peak fo r 1 second (partial discharge detection limit = 5 pc). an asterisk (*) marking branded on the component designates din v vde v 0884 - 10 approval.
data sheet adum3223/adum4223 rev. 0| page 7 of 20 din v vde v 0884 - 10 (vde v 0884 - 10) insulation charac teristics these isolators are suitable for reinforced isolation only within the safety limit data. maintenance of the safety data is en sured by protective circuits. the asterisk (*) marking on the package denotes din v vde v 0884 - 10 approval for a 560 v pe ak working voltage. table 8 . adum 3223 vde characteristics description conditions symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iii for rated mains voltage 400 v rms i to ii climatic classification 40/105/21 pollution degree per din vde 0110, table 1 2 maximum working insulation voltage v iorm 560 v p eak input - to - output test voltage, method b1 v iorm 1.875 = v pd(m) , 100% production test, t ini = t m = 1 sec, partial discharge < 5 pc v pd(m) 1050 v peak input - to - output test voltage, method a v iorm 1. 5 = v pd(m) , t ini = 60 sec, t m = 1 0 sec , partial discharge < 5 pc v pd(m) after environmental tests subgroup 1 896 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pd(m) , t ini = 60 sec, t m = 1 0 sec , partial discharge < 5 pc v pd(m) 672 v peak highest allowable overvol tage v iotm 4000 v peak surge isolation v oltage v peak = 10 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 6000 v peak safety - limiting values maximum value allowed in the event of a failure (see figure 2 ) maximum junction temperature t s 150 c safety total dissipated power p s 1.64 w insulation resistance at t s v io = 500 v r s >10 9 ? table 9 . adum 4223 vde characteristics description conditions symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 150 v rms i to iv for rated mains voltage 300 v rms i to iii for rated mains voltage 400 v rms i to ii climatic classification 40/105/21 pollution degree per din vde 0110, table 1 2 maximum working insulation voltage v iorm 849 v peak input - to - o utput test voltage, method b1 v iorm 1.875 = v pd(m) , 100% production test, t ini = t m = 1 sec, partial discharge < 5 pc v pd(m) 1 592 v peak input - to - output test voltage, method a v iorm 1. 5 = v pd(m) , t ini = 60 sec, t m = 1 0 sec , partial discharge < 5 p c v pd(m) after environmental tests subgroup 1 1273 v peak after input and/or safety test subgroup 2 and subgroup 3 v iorm 1.2 = v pd(m) , t ini = 60 sec, t m = 1 0 sec , partial discharge < 5 pc v pd(m) 1018 v peak highest allowable overvoltage v iotm 6 000 v peak surge isolation v oltage v peak = 10 kv, 1.2 s rise time, 50 s, 50% fall time v iosm 6000 v peak safety - limiting values maximum value allowed in the event of a failure (see figure 2 ) maximum junction temperature t s 150 c safety total dissipated power p s 2.77 w insulation resistance at t s v io = 500 v r s >10 9 ?
adum322 3/adum4223 data sheet rev. 0| page 8 of 20 1.8 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0 50 100 150 200 safe operating p vdd1 , p vdda or p vddb power (w) ambient temperature (c) 10450-102 figure 2. adum 3223 thermal derating curve, dependence of safety - limiting values on case temperature, per din v vde v 0884 - 10 3.0 2.5 2.0 1.5 1.0 0.5 0 0 50 100 150 200 safe operating p vdd1 , p vdda or p vddb power (w) ambient temperature (c) 10450-103 figure 3. adum 4 223 thermal derating curve, dependence of safety - limiting values on case temperature, per din v vde v 0884 - 10 recommended operatin g conditions table 10. parameter symbol min max unit operat ing junction temperature t j ?40 +125 c supply voltages 1 v dd1 3.0 5.5 v v dd a , v dd b 4.5 18 v v dd1 rise time t vdd1 1 v/ s maximum input signal rise and fall times t v ia, t v ib 1 ms common - mode transient immunity, input to output ?50 +50 k v/ s common - mode transient between output s ?50 +50 k v/ s 1 all voltag es are relative to their respective ground. see the application s i nformation section for information on immunity to external magnetic fields.
data sheet adum3223/adum4223 rev. 0| page 9 of 20 absolute maximum rat ings ambient temperature = 25c, unless otherwise noted. table 11. parameter symbol rating storage temperature t st ?55 c to +150 c operating junction temperature t j ?40 c to + 150 c supply voltages 1 v dd1 ?0.5 v to +7.0 v v dd a , v ddb ?0.5 v to +20 v input voltage 1 v ia , v ib , disable ?0.5 v to v dd 1 + 0.5 v output voltage 1 v oa v ob ?0.5 v to v dd a + 0.5 v ?0.5 v to v ddb + 0.5 v average output current, per pin 2 i o ?35 ma to +35 ma common - mode transients 3 cm h , cm l ?100 kv/s to +100 kv/s 1 all voltages are relative to their respective ground. 2 see figure 2 and figure 3 for information on maximum allowable cu rrent for various temperatures. 3 refers to common - mode transients across the insulation barrier. common - mode transients exceeding the absolute maximum rating can cause latch - up or permanent damage. stresses above those listed under absolute maximum rat ings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute max imum rating conditions for extended periods may affect device reliability. esd caution
adum322 3/adum4223 data sheet rev. 0| page 10 of 20 table 12. maximum continuous working voltage 1 parameter max unit constraint ac voltage, bipolar waveform 5 65 v peak 50- year minimum li fetime ac voltage, unipolar waveform 1131 v peak 50- year minimum lifetime dc voltage 1131 v peak 50- year minimum lifetime 1 refers to the continuous voltage magnitude imposed across the isolation barrier. see t he insulation lifetime section for more details. table 13 . truth table adum 3223 / adum 4223 (positive logic) 1 disable v ia input v ib input v dd1 state v dd a / v dd b state v oa output v ob output notes l l l powered powered l l outputs return to the input state within 1 s of disable = l assertion. l l h powe red powered l h outputs return to the input state within 1 s of disable = l assertion. l h l powered powered h l outputs return to the input state within 1 s of disable = l assertion. l h h powered powered h h outputs return to the input state within 1 s of disable = l assertion. h x x powered powered l l outputs take on default low state within 3 s of disable = h assertion. l l l unpowered powered l l outputs return to the input state within 1 s of v dd1 power restoration. x x x powered unpowered indeterminate indeterminate outputs return to the input state within 1 s of v dd a / v dd b power restoration. 1 x = dont care, l = low, and h = high.
data sheet adum3223/adum4223 rev. 0| page 11 of 20 pin configuration an d function descripti ons notes 1. nc = no connect. do not connect to this pin. v ia 1 v ib 2 v dd1 3 gnd 1 4 v dda 16 v oa 15 gnd a 14 nc 13 disable 5 nc 12 nc 6 v ddb 11 nc 7 v ob 10 v dd1 8 gnd b 9 adum3223/ adum4223 top view (not to scale) 10450-003 figure 4. pin configuration table 14. adum 3223 / adum 4223 pin function descriptions pin no. 1 mnemonic description 1 v ia logic input a. 6 , 7 , 12, 13 nc no connect. 2 v ib logic input b . 3, 8 v dd1 input supply voltage. 4 gnd 1 ground reference for input logic signals. 5 disable input disable. disables the isolator inputs and refresh circuits. outputs take on default low state within 3 s of dis able = h assertion . outputs return to the input state within 1 s of disable = l assertion. 9 gnd b ground reference for output b. 10 v ob output b. 11 v ddb outpu t b supply voltage . 14 gnd a ground reference for output a. 15 v oa output a. 16 v dda ou tp ut a supply voltage . 1 pin 3 and pin 8 are internally connected; connecting both pins to supply v dd1 is recommended. for specific layout guidelines, refer to the an - 1109 application note, recommendations for control of radiated emissions with i coupler devices .
adum322 3/adum4223 data sheet rev. 0| page 12 of 20 typical perfo r mance characteristic s 10450-105 ch1 5.00v ch1 5.00v m40.0ns a ch1 2.70v 2 1 2.50gs/s 100k points ch2 = v o (5v/div) ch1 = v i (5v/div) figure 5. output waveform for 2 nf load with 12 v output supply 10450-106 ch1 5.00v ch2 5.00v m20.0ns a ch1 2.70v 2 1 2.50gs/s 100k points ch2 = v ob (5v/div) ch1 = v oa (5v/div) a b a b ?820ps 1.40v 10.5ns 11.4v 11.3ns 10.0v figure 6. output matching and rise t ime waveforms for 2 nf load with 12 v output supply 500 0 100 200 300 400 0 200 400 600 800 1000 gate charge (nc) switching frequency (khz) 10450-107 v dd2 = 8v v dd2 = 10v v dd2 = 15v v dd2 = 5v fig ure 7. typical adum 3223 maximum load vs. frequency (r g = 1 ?) 1000 0 200 400 600 800 0 200 400 600 800 1000 gate charge (nc) switching frequency (khz) 10450-108 v dd2 = 8v v dd2 = 15v v dd2 = 5v v dd2 = 10v figure 8. typical adum 4223 maximum load vs. frequency (r g = 1 ?) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 0.25 0.50 0.75 1.00 i dd1 current (ma) frequency (mhz) 10450-109 v dd1 = 5v v dd1 = 3.3v figure 9. typical i dd1 supply current vs. frequency 50 40 30 20 10 0 0 0.25 0.50 0.75 1.00 i dda , i ddb current (ma) frequency (mhz) 10450-110 v dd2 = 15v v dd2 = 10v v dd2 = 5v figure 10 . typical i dda , i ddb supply current vs. frequency with 2 nf load
data sheet adum3223/adum4223 rev. 0| page 13 of 20 60 50 40 30 20 10 0 ?40 ?20 0 20 40 60 80 100 120 140 propagation delay (ns) junction temperature (c) 10450-111 t dhl t dlh figure 11 . typical propagation delay vs. temperature 60 50 40 30 20 10 0 3.0 5.5 5.0 4.5 4.0 3.5 propagation delay (ns) input supply voltage (v) 10450-112 t dhl t dlh figure 12 . typical propagation delay vs. input supply voltage, v dda , v ddb = 12 v 60 50 40 30 20 10 0 5 17 15 13 11 9 7 propagation delay (ns) output supply voltage (v) 10450-113 t dhl t dlh figure 13 . typical propagation delay vs. input supply voltage, v dd1 = 5 v 30 25 20 15 10 5 0 5 17 15 13 11 9 7 rise/fall time (ns) output supply voltage (v) 10450-114 rise time fall time figure 14 . typical rise/fall time variation vs. output supply voltage 5 4 3 2 1 0 5 17 15 13 11 9 7 propagation delay ch-ch matching (ns) output supply voltage (v) 10450-115 pd match t dlh pd match t dhl figure 15 . typical propagation delay , channel - to- channel matching vs. output supply voltage 5 4 3 2 1 0 ?40 ?20 0 20 40 60 80 100 120 140 propagation delay ch-ch matching (ns) junction temperature (c) 10450-116 pd match t dhl pd match t dlh figure 16 . typical propagation delay , channel - to- channel matching vs. temperature, v dda , v ddb = 12 v
adum322 3/adum4223 data sheet rev. 0| page 14 of 20 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 4 18 16 14 12 10 8 6 r out () output supply voltage (v) 10450-117 v out source resistance v out sink resistance figure 17 . typi cal output resistance vs. output supply voltage 8 7 6 5 4 3 2 1 0 4 18 16 14 12 10 8 6 source/sink current (a) output supply voltage (v) 10450-118 sink i out source i out figure 18 . typical o utput current vs. output supply voltage
data sheet adum3223/adum4223 rev. 0| page 15 of 20 applications information pc board layout the adum3223 / adum4223 digital isolators require no exter- nal interface circuitry for the logic interfaces. power supply bypassing is required at the input and output supply pins, as shown in figure 19. use a small ceramic capacitor with a value between 0.01 f and 0.1 f to provide a good high frequency bypass. on the output power supply pin, v dda or v ddb , it is recommended to also add a 10 f capacitor to provide the charge required to drive the gate capacitance at the adum3223 / adum4223 outputs. on the output supply pin, the bypass capacitor use of vias should be avoided or multiple vias should be employed to reduce the inductance in the bypassing. the total lead length between both ends of the smaller capacitor and the input or output power supply pin should not exceed 5 mm. 10450-119 v ia v dda v ib v oa v dd1 gnd b gnd 1 nc disable nc nc v ddb nc v ob gnd 1 gnd b figure 19. recommended pcb layout propagation delay-related parameters propagation delay is a parameter that describes the time it takes a logic signal to propagate through a component. the propagation delay to a logic low output can differ from the propagation delay to a logic high output. the adum3223 / adum4223 specify t dlh (see figure 20) as the time between the rising input high logic threshold, v ih , to the output rising 10% threshold. likewise, the falling propagation delay, t dhl , is defined as the time between the input falling logic low threshold, v il , and the output falling 90% threshold. the rise and fall times are dependent on the loading conditions and are not included in the propagation delay, which is the industry standard for gate drivers. output input t dlh t r 90% 10% v ih v il t f t dhl 10450-005 figure 20. propagation delay parameters channel-to-channel matching refers to the maximum amount that the propagation delay differs between channels within a single adum3223 / adum4223 component. propagation delay skew refers to the maximum amount that the propagation delay differs between multiple adum3223/ adum4223 components operating under the same conditions. thermal limitations and switch load characteristics for isolated gate drivers, the necessary separation between the input and output circuits prevents the use of a single thermal pad beneath the part, and heat is, therefore, dissipated mainly through the package pins. package thermal dissipation limits the performance of switching frequency vs. output load, as illustrated in figure 7 and figure 8 for the maximum load capacitance that can be driven with a 1 series gate resistance for different values of output voltage. for example, this curve shows that a typical adum3223 can drive a large mosfet with 140 nc gate charge at 8 v output (which is equivalent to a 17 nf load) up to a frequency of about 300 khz. output load characteristics the adum3223 / adum4223 output signals depend on the characteristics of the output load, which is typically an n-channel mosfet. the driver output response to an n-channel mosfet load can be modeled with a switch output resistance (r sw ), an inductance due to the printed circuit board trace (l trace ), a series gate resistor (r gate ), and a gate-to-source capacitance (c gs ), as shown in figure 21. adum3223/ adum4223 v ia v oa r sw r gate c gs l trace v o 10450-006 figure 21. rlc model of the gate of an n-channel mosfet r sw is the switch resistance of the internal adum3223/ adum4223 driver output, which is about 1.1 . r gate is the intrinsic gate resistance of the mosfet and any external series resistance. a mosfet that requires a 4 a gate driver has a typical intrinsic gate resistance of about 1 and a gate-to- source capacitance, c gs , of between 2 nf and 10 nf. l trace is the inductance of the printed circuit board trace, typically a value of 5 nh or less for a well-designed layout with a very short and wide connection from the adum3223 / adum4223 output to the gate of the mosfet. the following equation defines the q factor of the rlc circuit, which indicates how the adum3223 / adum4223 output responds to a step change. for a well-damped output, q is less than 1. adding a series gate resistance dampens the output response.
adum322 3/adum4223 data sheet rev. 0| page 16 of 20 gs trace gate sw c l r r q + = ) ( 1 in figure 5 , the adum 3223/ adum 4223 output waveforms for a 1 2 v output are shown for a c gs of 2 nf. note the small amount of ringing of the output in figure 5 with c gs of 2 nf , r sw of 1.1 ?, r gate of 0 ? , and a calculated q factor of 0.75 , where less than 1 is desired for good damping. output ringing can be reduced by adding a series gate resistance to dampen the response. for applications of less than 1 nf load, it is recommended to add a series gate resistor of about 2 ? to 5 ? . dc correctness and m agnetic field immuni ty positive and negative logic transitions at the isolator input cause narrow (~1 ns) pulses to be sent to the decoder via the transformer. the decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. in the absence of logic transitions of more than 1 s at the input, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness a t the output. if the decoder receives no internal pulses for more than about 3 s, the input side is assumed to be unpowered or nonfunc - tional, in which case, the isolator output is forced to a default low state by the watchdog timer circuit. in addition, the outputs are in a low default state while the power is coming up before the uvlo threshold is crossed. the adum 3223/ adum 4223 is immune to external magnetic fields. the limitation on the adum 3223/ adum 4223 magnetic field immunity is set by the condition in which induced voltage in the transformer receiving coil is su fficiently large to either falsely set or reset the decoder. the following analysis defines the conditions under which this can occur. the 3 v operating condition of the adum 3223 / adum 4223 is examined because it represents the most susceptible mode of ope ration. the pulses at the trans former output have an amplitude greater than 1.0 v. the decoder has a sensing threshold at about 0.5 v, therefore establishing a 0. 5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by v = ( ?d / dt ) ? r n 2 , n = 1, 2, ... , n where: is the magnetic flux density (gauss). n is the number of turns in the receiving coil. r n is the radius of the nth turn in the receiving coil (cm). given the geometry of the receiving coil in the adum 3223/ adum 4223 and an imposed requirement that the induc ed voltage is , at most , 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field is calculated, as shown in figure 22. 100 10 1 0.1 0.01 0.001 1k 10k 100k 1m 10m 100m maximum allowable magnetic flux density (kgauss) magnetic field frequency (hz) 10450-122 figure 22 . maximum allowable external magnetic flux density for ex ample, at a magnetic field frequency of 1 mhz, the maxi - mum allowable magnetic field of 0. 08 kgauss induces a voltage of 0.25 v at the receiving coil. this is about 50% of the sensing threshold and does not cause a faulty output transition. simi - larly, if such an event were to occur during a transmitted pulse (and had the worst - case polarity), the received pulse is reduced from >1.0 v to 0.75 v, still well above the 0.5 v sensing thresh - old of the decoder. the preceding magnetic flux density values corresp ond to specific current magnitudes at given distances away from the adum 3223/ adum 4223 transformers . figure 23 expresses these allowable current magnitudes as a function of frequency for selected distances. as shown, the adum 3223/ adum 4223 are immune and only can be affected by extremely large currents operated at a high frequency and very close to the co mponent. for the 1 mhz example, a 0. 2 ka current must be placed 5 mm away from the adum 3223/ adum 4223 to affect the component s operation. 1k 100 10 1 0.1 0.01 1k 10k 100k 1m 10m 100m maximum allowable current (ka) magnetic field frequency (hz) 10450-123 distance = 1m distance = 100mm distance = 5mm figure 23 . maximum allowable current for various current - to- adum 3223 / adum 4223 spacings
data sheet adum3223/adum4223 rev. 0| page 17 of 20 power consumption the supply cu rrent at a given channel of the adum 3223 / adum 4223 isolator is a function of the supply voltage, channel data rate, and channel output load. for each input cha nnel, the supply current is given by i ddi = i ddi ( q ) f 0.5 f r i ddi = i ddi ( d ) (2 f C f r ) + i ddi(q) f > 0.5 f r for each output channel, the supply current is given by i ddo = i ddo ( q ) f 0.5 f r i ddo = ( i ddo ( d ) + (0.5) c l v ddo ) (2 f C f r ) + i ddo( q ) f > 0.5 f r where: i ddi(d) , i ddo(d) are the input and output dyn amic supply currents per channel (ma/mbps). c l is the output load capacitance (pf). v ddo is the output supply voltage (v). f is the input logic signal frequency (mhz, half of the input data rate, nrz signaling). f r is the input stage refresh rate (mbps ). i ddi(q) , i ddo(q) are the specified input and output quiescent supply currents (ma). to calculate the total supply current, the supply currents for each input and outpu t channel corresponding to i dd1 , i dda , and i ddb are calculated and totaled. figure 9 provides total input i dd1 supply current as a function of data rate for both input channels. figure 10 provides total i dd a or i ddb supply current as a function of data rate for both outputs loaded with 2 nf capacitance. insulation lifetime all insulati on structures eventually break down when subjected to voltage stress over a sufficiently long period. the rate of insu - lation degradation is dependent on the characteristics of the voltage waveform applied across the insulation. in addition to the testing performed by the regulatory agencies, analog devices carries out an extensive set of evaluations to determine the lifetime of the insulation structure within the adum 3223 / adum 4223. analog devices performs accelerated life testing using voltage levels higher than the rated continuous working voltage. accel - eration factors for several operating conditions are determined. these factors allow calculation of the tim e to failure at the actual working voltage. the values shown in table 11 summarize the peak voltage for 50 years of service life for a bipolar ac operating condition, and the maximum csa/vde approved working voltages. in many cases, the approved working voltage is higher than 50 - year service life voltage. operation at these high working voltages can lead to shortened insulation life in some cases. the insulation lifetime of the adum 3223/ adum 4223 depends on the voltage waveform type imposed across the isolation barrier. the i coupler insulation structure degrades at different rates depending on whether the waveform is bipolar ac, unipo - lar ac, or dc. figure 24 , fi gure 25 , and figure 26 illustrate these different isolation voltage waveforms. a bipolar ac voltage environment is the worst case for the i coupler products and is the 50 - year operating lifetime that analog devices recommends for m aximum working voltage. in the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower. this allows operation at higher working voltages while still achieving a 50 - year service life. any cross - insulation voltage waveform that does not conform to figure 25 or figure 26 should be treated as a bipolar ac wave form, and its peak voltage should be limited to the 50 - year lifetime voltage value listed in table 12 . note that the voltage presented in figure 25 is shown as sinu - soidal fo r illustration purposes only. it is meant to represent any voltage waveform varying between 0 v and some limiting value. the limiting value can be positive or negative, but the voltage cannot cross 0 v. 0v rated peak voltage 10450-009 figure 24 . bipolar ac wave form 0v rated peak voltage 10450-010 figure 25 . unipolar ac waveform 0v rated peak voltage 10450-0 1 1 figure 26 . dc waveform
adum322 3/adum4223 data sheet rev. 0| page 18 of 20 outline dimensions controlling dimensions are in millimeters; inch dimensions (in p arentheses) are rounded-off millimeter equi v alents for reference on l y and are not appropri a te for use in design. compliant t o jedec s t andards ms-012-ac 10.00 (0.3937) 9.80 (0.3858) 16 9 8 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 1.27 (0.0500) bsc sea ting plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarit y 0.10 8 0 060606- a 45 figure 27. 16 - lead standa rd small outline package [soic_n ] narrow body (r - 16) dimensions shown in millimeters and (inches) controll ing dimen sions are in milli meter s; inc h dimensio ns (in p aren these s) are round ed-of f milli met er equiv alents for refer ence onl y and are not appr opria te for use in desi gn. complian t t o jedec st andar ds ms-01 3-aa 10. 50 (0. 413 4) 10.1 0 (0.39 76) 0.30 (0. 01 18) 0.10 (0.0 039) 2.6 5 (0. 1043 ) 2.35 (0.0 925) 10. 65 (0.4 193) 10.0 0 (0. 393 7) 7.60 (0.29 92) 7.40 (0.2 913 ) 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.05 00) 0.40 (0.01 57) copla narit y 0.1 0 0.33 (0.0 130) 0.2 0 (0. 0079) 0.51 (0.02 01) 0.31 (0.01 22) sea ting plane 8 0 1 6 9 8 1 1.2 7 (0. 0500 ) bsc 03- 27-2 007- b figure 28 . 16 - lead standa rd small outline package [soic_w ] wide body (r w - 16) dimensions shown in millimeters and (inches)
data sheet adum3223/adum4223 rev. 0| page 19 of 20 ordering guide model 1 no. of channels output peak current (a) minimum output voltage (v) temperature range package d escription package option ordering quantity adum 3223arz 2 4 4.5 ?40c to +125c 16- lead soic _n r -16 adum 3223ar z - rl7 2 4 4.5 ?40c to +125c 16- lead soic _n , 13 tape and reel r -16 1,000 adum 3223brz 2 4 7.5 ?40c to +125c 16- lead soic _n r -16 adum 3223brz - rl7 2 4 7.5 ?40c to +125c 16- lead soic _n , 13 tape and reel r -16 1,000 adum 3223crz 2 4 11.5 ?40c to +125c 16- lead soic _n r -16 adum 3223crz - rl7 2 4 11.5 ?40c to +125c 16- lead soic _n , 13 tape and reel r -16 1,000 adum 4223arwz 2 4 4.5 ?40c to +125c 16- lead soic _w rw -16 adum 4223arwz -rl 2 4 4.5 ?40c to +125 c 16- lead soic _w , 13 tape and reel rw -16 1,000 adum 4223brwz 2 4 7.5 ?40c to +125c 16- lead soic _w rw -16 adum 4223brwz -rl 2 4 7.5 ?40c to +125c 16- lead soic _w , 13 tape and reel rw -16 1,000 adum 4223crwz 2 4 11.5 ?40c to +125c 16- lead soic _w rw -16 adum 4223crwz - rl 2 4 11.5 ?40c to +125c 16- lead soic _w , 13 tape and reel rw -16 1,000 eval - adum 3223aebz 2 4 4 .5 ?40c to +125c adum 3223 evaluation board eval - adum 4223aebz 2 4 4.5 ?40c to +125c adum 4223 evaluation board 1 z = rohs compliant part.
adum3223/adum4223 data sheet rev. 0| page 20 of 20 notes ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d10450 - 0 - 5/12(0)

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